没有 CPU、没有操作系统——用 Verilog 纯硬件逻辑在 FPGA 上实现俄罗斯方块：七种方块的旋转碰撞、消行计分、数码管显示。

Using Silvaco ATLAS to simulate a complete PN junction diode from mesh definition to I-V characteristic extraction, understanding unidirectional conductivity from the physics level.

No CPU, no operating system—implementing Tetris on FPGA using pure Verilog hardware logic: rotation, collision detection, line clearing, and scoring for all seven tetrominoes with seven-segment display.

Encoding piece ranks with resistor values lets the circuit board act as referee—from schematic to PCB layout, a complete electronic military chess design that requires no third player.

用 MATLAB 从零搭建 FMCW 雷达信号处理仿真：从单目标测距到多目标三维定位，完整实现测距、测速、测角的算法链路。

Building a complete FMCW radar signal processing simulation from scratch in MATLAB: from single-target ranging to multi-target 3D positioning, implementing the full algorithm chain for range, speed, and angle measurement.